The latest schematics, PCB layouts, and the microcontroller firmware are available from gitorious:
$ git clone git://gitorious.org/usbflattiny/usbflattiny.git
The Gerber files, schematics, and some PNG images of the 0.1 version of the board are available from:
- The usbflattiny hardware is a tiny (20mm x 12.25mm), bus-powerered USB 1.1 device with an Atmel ATtiny45-20SU microcontroller.
- It can behave as a HID device, or alternatively other USB classes.
- The device has four LEDs so you can create blinking stuff with it.
- During normal operation (usbflattiny is connected to USB), four LEDs can be controlled by the ATtiny45 via the pins PB1, PB3, PB4, and PB5.
- In addition, it is possible to control the LEDs from the USB host (using a small libusb-based user-space tool).
- The PCB/design (2 layers) is SMD-based, the ATtiny45 is an SO8 chip, all resistors, capacitors etc. are 0603-sized SMD components.
Free Software tools used
- The hardware is designed using the Free Software EDA tools gEDA/gschem and PCB.
- The firmware is written in C, using avr-gcc, avr-libc, and the GPL'd software-USB implementation V-USB (previously known as AVR-USB).
- Any host USB software (if needed) will be implemented using libusb.
- For programming the ATtiny45 any AVR ISP programmer can be used, e.g. the Free Software and Open Hardware usbprog.
- The host-software for the ISP programmer is likely the Free Software avrdude in most cases.
- The ATtiny45 is flashed via any AVR ISP programmer (e.g. usbprog) connected to the MISO, MOSI, SCK, RESET, VCC, and GND pins.
- There is no standard 6-pin or 10-pin ISP header on the PCB (in order to reduce the PCB size).
- Instead, flashing is done by attaching tiny probes directly to the ATtiny45, or temporarily soldering some wires to the ATtiny45 pins.
- GND on the ISP programmer must be connected to GND on the ATtiny45 (i.e., they must have a common ground).
- The ISP programmer powers the ATtiny45 while it's being programmed. During this time usbflattiny must not be connected to USB.
- We use the GPL'd software-USB implementation V-USB (previously known as AVR-USB).
- Planned config:
#define USB_CFG_IOPORTNAME B #define USB_CFG_DMINUS_BIT 0 #define USB_CFG_DPLUS_BIT 2
- ATtiny25/45/85 datasheet (PDF)
- Application Note AVR042: AVR Hardware Design Considerations (PDF)
- Application Note AVR053: Calibration of the internal RC oscillator (PDF)
- Application Note AVR911: AVR Open-source Programmer (PDF
|1||Atmel ATtiny45-20SU||SO8||—||U1||1.45 Euro||—|
|1||Capacitor||0603||100nF (0.1uF)||C1||0.04 Euro||—|
|2||Z-diode||SOD80||3V6||D5, D6||0.05 Euro||—|
|4||LED||0603||—||L1, L2, L3, L4||0.08 Euro||—|
|4||Resistor||0603||390R||R1, R2, R3, R4||0.05 Euro||—|
|2||Resistor||0603||68R||R5, R6||0.05 Euro||—|
PCB production settings
I plan to have pcbcart.com produce the usbflattiny PCBs.
|Material Details||Standard Tg 140C||—|
|Board type||single unit||—|
|Board Size (width)||20mm||There will be a popup saying that boards this small may cost a bit more. Just click OK and ignore it, the price difference seems to be neglectable.|
|Board Size (height)||12.25mm||There will be a popup saying that boards this small may cost a bit more. Just click OK and ignore it, the price difference seems to be neglectable.|
|Quantity||...||Choose how many boards you want (try out different numbers, price varies a lot with quantity).|
|Thickness (Finished Board)||1.6mm||—|
|Surface Finish||ENIG - Electroless Nickle / Immersion Gold - RoHS||You should use ENIG as finish — not "Hot air solder leveling" (HASL) — because the solderstop tends to peel off when using HASL.|
|Copper Weight (Finished)||35um||—|
|Min. Tracing/Spacing||0.2mm (8mil)||—|
|Min. Annular Ring||0.3mm (11.8mil)||—|
|Smallest Holes||0.4mm (15.8mil)||—|
|Holes Numbers||Under 300||—|
|Surface Mount||2 sides||—|
|Soldermask Color||Green||Choose whichever you like, but price may change.|
|Matt Color||None||Only possible for green and black; price difference is neglectable.|
|Silkscreen Legend||2 sides||Removing silkscreen does not make the PCBs much cheaper.|
|Silkscreen Legend Color||White||—|
|Gold Fingers Number||Leave this field empty.|
|Gold Fingers Chamfer||None||—|
|Slots in Board||No Slot in Board||—|
|Slots quantity in board||Leave this field empty.|
|Testing||Yes||You really, really want this (so-called E-Test in German)! At pcbcart.com it's always performed, at other manufacturers this may not be the case.|
|Date Code Marking||No||—|
|Lead Time||in 12 days||The setting in 8 days will be slightly more expensive (but not much).|
gEDA/PCB DRC settings
I used the following Design Rule Check (DRC) settings in the PCB software (File -> Preferences -> Sizes):
|Minimum copper spacing||8.0mil||0.203mm|
|Minimum copper width||8.0mil||0.203mm|
|Minimum touching copper overlap||8.0mil||0.203mm|
|Minimum silk width||8.0mil||0.203mm|
|Minimum drill diameter||15.8mil||0.400mm|
|Minimum annular ring||11.8mil||0.300mm|
I used the following route style:
1 Via size = via hole + 2 * min.annular ring = 0.4mm + 0.3mm + 0.3mm = 1.0mm.